400Gb/s QSFP-DD FR4 2km Transceiver

1

GND

Ground

1B

1

2

CML-I

Tx2n

Transmitter Inverted Data Input

3B

3

CML-I

Tx2p

Transmitter Non-Inverted Data

Input

3B

4

GND

Ground

1B

1

5

CML-I

Tx4n

Transmitter Inverted Data Input

3B

6

CML-I

Tx4p

Transmitter Non-Inverted Data Input

3B

7

GND

Ground

1B

1

8

LVTTL-I

ModSelL

Module Select

3B

9

LVTTL-I

ResetL

Module Reset

3B

10

VccRx

+3.3V Power Supply Receiver

2B

2

11

LVCMOS-

I/O

SCL

2-wire serial interface clock

3B

12

LVCMOS-

I/O

SDA

2-wire serial interface data

3B

13

GND

Ground

1B

1

14

CML-O

Rx3p

Receiver Non-Inverted Data Output

3B

15

CML-O

Rx3n

Receiver Inverted Data Output

3B

16

GND

Ground

1B

1

17

CML-O

Rx1p

Receiver Non-Inverted Data Output

3B

18

CML-O

Rx1n

Receiver Inverted Data Output

3B

19

GND

Ground

1B

1

20

GND

Ground

1B

1

21

CML-O

Rx2n

Receiver Inverted Data Output

3B

22

CML-O

Rx2p

Receiver Non-Inverted Data Output

3B

23

GND

Ground

1B

1

24

CML-O

Rx4n

Receiver Inverted Data Output

3B

25

CML-O

Rx4p

Receiver Non-Inverted Data Output

3B

26

GND

Ground

1B

1

27

LVTTL-O

ModPrsL

Module Present

3B

28

LVTTL-O

IntL

Interrupt

3B

29

VccTx

+3.3V Power supply transmitter

2B

2

30

Vcc1

+3.3V Power supply

2B

2

31

LVTTL-I

InitMode

Initialization mode; In legacy QSFP

applications, the InitMode pad is called LPMODE

3B

32

GND

Ground

1B

1

33

CML-I

Tx3p

Transmitter Non-Inverted Data

Input

3B

34

CML-I

Tx3n

Transmitter Inverted Data Input

3B

35

GND

Ground

1B

1

36

CML-I

Tx1p

Transmitter Non-Inverted Data

Input

3B

37

CML-I

Tx1n

Transmitter Inverted Data Input

3B

38

GND

Ground

1B

1

39

GND

Ground

1A

1

40

CML-I

Tx6n

Transmitter Inverted Data Input

3A

41

CML-I

Tx6p

Transmitter Non-Inverted Data

Input

3A

42

GND

Ground

1A

1

43

CML-I

Tx8n

Transmitter Inverted Data Input

3A

44

CML-I

Tx8p

Transmitter Non-Inverted Data

Input

3A

45

GND

Ground

1A

1

46

Reserved

For future use

3A

3

47

VS1

Module Vendor Specific 1

3A

3

48

VccRx1

3.3V Power Supply

2A

2

49

VS2

Module Vendor Specific 2

3A

3

50

VS3

Module Vendor Specific 3

3A

3

51

GND

Ground

1A

1

52

CML-O

Rx7p

Receiver Non-Inverted Data Output

3A

53

CML-O

Rx7n

Receiver Inverted Data Output

3A

54

GND

Ground

1A

1

55

CML-O

Rx5p

Receiver Non-Inverted Data Output

3A

56

CML-O

Rx5n

Receiver Inverted Data Output

3A

57

GND

Ground

1A

1

58

GND

Ground

1A

1

59

CML-O

Rx6n

Receiver Inverted Data Output

3A

60

CML-O

Rx6p

Receiver Non-Inverted Data Output

3A

61

GND

Ground

1A

1

62

CML-O

Rx8n

Receiver Inverted Data Output

3A

63

CML-O

Rx8p

Receiver Non-Inverted Data Output

3A

64

GND

Ground

1A

1

65

NC

No Connect

3A

3

66

Reserved

For future use

3A

3

67

VccTx1

3.3V Power Supply

2A

2

68

Vcc2

3.3V Power Supply

2A

2

69

Reserved

For Future Use

3A

3

70

GND

Ground

1A

1

71

CML-I

Tx7p

Transmitter Non-Inverted Data Input

3A

72

CML-I

Tx7n

Transmitter Inverted Data Input

3A

73

GND

Ground

1A

1

74

CML-I

Tx5p

Transmitter Non-Inverted Data Input

3A

75

CML-I

Tx5n

Transmitter Inverted Data Input

3A

76

GND

Ground

1A

1

Operating Case 

Temperature

TOP

0

70

degC

Power Supply 

Voltage

VCC

3.135

3.3

3.465

V

Data Rate, each Lane

26.5625

GBd

PAM4

Data Rate Accuracy

-100

100

ppm

Pre-FEC Bit Error Ratio

2.4x10-4

Post-FEC Bit Error Ratio

1x10-12

1

Link Distance

D

0.002

2

km

2

Power Consumption

12

W

Supply Current

Icc

3.63

A

Transmitter (each Lane)

Signaling Rate, each Lane

TP1

26.5625 ± 100 ppm

GBd

Differential 

pk-pk

 Input 

Voltage 

Tolerance

TP1a

900

mVpp

1

Differential 

Termination 

Mismatch

TP1

10

%

Differential

Input

Return 

Loss

TP1

IEEE 802.3-

2015

Equation

(83E-5)

dB

Differential to 

Common 

Mode Input 

Return Loss

TP1

IEEE 802.3-

2015

Equation

(83E-6)

dB

Module 

Stressed

 Input Test

TP1a

See IEEE 802.3bs 120E.3.4.1

2

Single-ended 

Voltage 

Tolerance 

Range (Min)

TP1a

-0.4 to 3.3

V

DC Common 

Mode Input 

Voltage

TP1

-350

2850

mV

3

Receiver 

(each Lane)

Signaling Rate, 

each lane

TP4

26.5625 ± 100 ppm

GBd

Differential 

Peak-to-Peak 

Output 

Voltage

TP4

900

mVpp

AC Common 

Mode Output

Voltage, RMS

TP4

17.5

mV

Differential 

Termination 

Mismatch

TP4

10

%

Differential 

Output 

Return Loss

TP4

IEEE 802.3-

2015

Equation

(83E-2)

Common to 

Differential 

Mode Conversion 

Return Loss

TP4

IEEE 802.3-

2015

Equation

(83E-3)

Transition Time, 

20% to 80%

TP4

9.5

ps

Near-end 

Eye Symmetry 

Mask

Width (ESMW)

TP4

0.265

UI

Near-end 

Eye Height,

Differential

TP4

70

mV

Far-end 

Eye Symmetry

Mask

Width (ESMW)

TP4

0.2

UI

Far-end 

Eye Height, 

Differential

TP4

30

mV

Far-end

 Pre-cursor 

ISI Ratio

TP4

-4.5

2.5

%

Common 

Mode Output 

Voltage (Vcm)

TP4

-350

2850

mV

3

Wavelength Assignment

L0

1264.5

1271

1277.5

nm

L1

1284.5

1291

1297.5

nm

L2

1304.5

1311

1317.5

nm

L3

1324.5

1331

1337.5

nm

Transmitter

Data Rate, each Lane

53.125 ± 100 ppm

GBd

Modulation Format

PAM4

Side-mode 

Suppression Ratio

SMSR

30

dB

Total Average

Launch Power

PT

9.3

dBm

Average Launch 

Power, each Lane

PAVG

-3.3

3.5

dBm

1

Outer Optical 

Modulation

Amplitude (OMAouter), 

each Lane

POMA

-0.3

3.7

dBm

2

Launch Power in 

OMAouter minus 

TDECQ, each Lane

for ER ≥ 4.5dB

for ER < 4.5dB

-1.7

-1.6

dB

Transmitter and 

Dispersion Eye 

Closure for PAM4, 

each Lane

TDECQ

3.4

dB

TDECQ – 10*log10(Ceq), 

each Lane

3.4

dB

3

Extinction Ratio

ER

3.5

dB

Difference in 

Launch Power 

between any 

Two Lanes

(OMAouter)

4

dB

RIN17.1OMA

RIN

-136

dB/Hz

Optical Return

 Loss Tolerance

TOL

17.1

dB

Transmitter Reflectance

RT

-26

dB

Transmitter Transition 

Time

17

ps

Average Launch 

Power of OFF 

Transmitter, 

each Lane

Poff

-20

dBm

Receiver

Data Rate, 

each Lane

53.125 ± 100 ppm

GBd

Modulation Format

PAM4

Damage Threshold, 

each Lane

THd

4.5

dBm

4

Average Receive Power, 

each Lane

-7.3

3.5

dBm

5

Receive Power

 (OMAouter), 

each Lane

3.7

dBm

Difference in 

Receiver Power 

between any 

Two Lanes

(OMAouter)

4.1

dB

Receiver 

Sensitivity (OMAouter), 

each Lane

SEN

Equation (1)

dBm

6

Stressed Receiver 

Sensitivity

(OMAouter),

each Lane

SRS

-2.6

dBm

7

Receiver Reflectance

RR

-26

dB

LOS Assert

LOSA

-20

dBm

LOS De-assert

LOSD

-10.3

dBm

LOS Hysteresis

LOSH

0.5

dB

Stressed Conditions 

for Stress Receiver 

Sensitivity (Note 8)

Stressed Eye

 Closure for PAM4

(SECQ),

 Lane under Test

3.4

dB

SECQ – 10*log10(Ceq), 

Lane under Test

3.4

dB

OMAouter of

 each Aggressor Lane

1.5

dBm

Modulation Format

PAM4

Notes:

1. Average launch power, each lane (min) is informative and not the principal indicator of signal strength. A transmitter with launch power below this value cannot be compliant; however, a value above this does not ensure compliance.

2. Even if the TDECQ < 1.4 dB for an extinction ratio of ≥ 4.5 dB or TDECQ < 1.3 dB for an extinction ratio of < 4.5 dB, the OMAouter (min) must exceed the minimum value specified here.

3. Ceq is a coefficient defined in IEEE Std 802.3-2018 clause 121.8.5.3 which accounts for reference equalizer noise enhancement.

4. Average receive power, each lane (min) is informative and not the principal indicator of signal strength. A received power below this value cannot be compliant; however, a value above this does not ensure compliance.

5. The receiver shall be able to tolerate, without damage, continuous exposure to an optical input signal having this average power level.

6. Receiver sensitivity (OMAouter) is informative and is defined for a transmitter with a value of SECQ up to 3.4 dB. Receiver sensitivity should meet Equation (1), which is illustrated in Figure 4.

Where:

RS is the receiver sensitivity, and

SECQ is the SECQ of the transmitter used to measure the receiver sensitivity.

7. Measured with conformance test signal at TP3 for the BER equal to 2.4x10-4.

Temperature Monitor 

Absolute Error

DMI_Temp

-3

3

degC

Over operating temperature range

Supply Voltage

Monitor

Absolute Error

DMI _VCC

-0.1

0.1

V

Over full operating

range

Channel RX 

Power Monitor 

Absolute Error

DMI_RX_Ch

-2

2

dB

1

Channel Bias Current

Monitor

DMI_Ibias_Ch

-10%

10%

mA

Channel TX 

Power Monitor

Absolute Error

DMI_TX_Ch

-2

2

dB

1